1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a semiconductor memory device configured to execute a standby function for saving power on a standby operation.
2. Description of the Related Art
Semiconductor memory devices, particularly those for use in mobile terminals have been strongly requested to reduce power consumption during standby. In response to the request, there have been proposed such semiconductor memory devices that have a standby operation function (standby function) of lowering the supply voltage during standby, for example.
By way of example, for a DRAM (Dynamic Random Access Memory) that requires data rewrite (refresh), reductions in power consumption during standby have been strongly requested. The DRAM, as it requires data rewrite, is thought to consume large power on standby. In practice, however, a power saving is made possible through designs such as a lowered supply voltage on standby operation and an elongated data write interval (see, for example, U.S. Pat. No. 7,145,819). It has been found that the DRAM is more advantageous in saving power than a SRAM (Static Random Access Memory) that requires no data rewrite.
The power saving with the lowered supply voltage and the elongated rewrite interval, however, may cause an error in data stored in a DRAM cell. The data retention property of the DRAM cell greatly varies among DRAM cells. If the lower limit of the supply voltage and the upper limit of the rewrite interval are determined to fit some DRAM cells poor in data retention property, the power saving is also limited.
Therefore, it may be considered that the DRAM cells poor in data retention property can be treated with a redundant cell replacement or an error correction while the supply voltage is lowered or the rewrite interval is determined with reference to other DRAM cells excellent in data retention property.
The redundant cell replacement is a relief means that is utilized for the purpose of relieving a failure mainly caused during a production stage. Therefore, a proportion of the number of relievable cells to the storage capacity (hereinafter referred to as a relief rate) is designed on the basis of a production failure rate. In general, for a storage capacity of several M bits, there are prepared spare cells just enough to relieve several failed cells and a non-volatile memory (for storing faulty addresses). The use of the redundant cell replacement means for the purpose of improving the data retention property in saving power on standby as described above requires the relief rate to be improved several times to several tens of times. In that case, the redundant cells are prepared aligned in the row and column directions. Therefore, the area proportion of the redundant cells is expected to reach several 10% of the whole memory cells and the area overhead is expected to become an unallowable extent.
The error correction is a relief means that is utilized for the purpose of correcting a soft error mainly caused by the influence of radioactive rays. The error correction scheme may often add around 10% redundant bits to the data bit width of original data. This can be easily used for the purpose of complementing the deterioration of the data retention property associated with the power saving on the standby function operation as described above. The use of such a scheme for this purpose allows the proportion of redundant bits to exceed 10%, which results in an area increase unallowable in mobile instruments required for saving power. An increase in data bit width allows the proportion of redundant bits to be lowered relatively. In this case, however, the circuitry scale of the encoder and decoder required for error correction is made larger. Eventually, the area increase rate associated with the error correction means mounted is hardly kept lower than 10%.
The problem about the data error associated with the standby operation during such standby may arise not only in the DRAM that requires rewrite as described above but also in other semiconductor memory devices that require no rewrite but have a standby function, such as a SRAM and a flash EEPROM similarly.